The present invention generally relates to semiconductor device manufacturing, and more particularly to the fabrication of stacked metal wires of an inductor.
Miniaturization of electronic circuits is a goal in virtually every field, not only to achieve high density in mechanical packaging, but also to decrease the manufacturing costs of the circuits. Many digital and analog circuits, including complex microprocessors and operational amplifiers, have been successfully implemented in silicon based integrated circuits (ICs). These circuits typically include active devices, such as bipolar transistors and field effect transistors (FETs), diodes of various types, and passive devices, such as resistors and capacitors.
One area that remains a challenge to miniaturize is radio frequency (RF) circuits, such as those used in cellular telephones, wireless modems, and other types of communication equipment. The problem is the difficulty in producing a good inductor in silicon technologies that is suitable for RF applications. Attempts to integrate inductors into silicon technologies have yielded either inductor Q values less than five or required special metallization layers such as gold. The Q value of an inductor may equal the efficiency of the inductor divided by the losses of the inductor.
It is well known that the direct current (DC) resistance of a metal line that forms a spiral inductor is a major contributor to the inductor Q degradation. One way to reduce this effect is to use wide metal line-widths, however, this increases the inductor area and the parasitic capacitance associated with the structure. The larger inductor area limits the miniaturization that can be achieved, and the parasitic capacitance associated with the larger area decreases the self-resonance frequency of the inductor, thereby limiting its useful frequency range. Also, since the Q is directly proportional to frequency and inversely proportional to the series loss of the inductor, the metal line widths cannot be arbitrarily large.
One approach may include fabricating an inductor in which multiple metal wires are stacked vertically to achieve desired Q values. Optimally, the multiple metal wires would all be of an equal width and would be aligned perfectly one on top of the other; however, due to fabrication constraints and current processing capabilities or limitations there exist some misalignment between one metal wire stacked above another metal wire. The misalignment between adjacent metal wires may yield performance and reliability issues due to cracking at or near an intersection between adjacent metal wires.
Therefore, it may be desirable, among other things, to overcome the deficiencies described above.